© Thomas Kunz 2000
SCE 574
207
Framework for Analysis of Solutions
äEach process executes at nonzero speed but no assumption on the relative speed of n processes äGeneral structure of a process:
ämany CPU may be present but memory hardware prevents simultaneous access to the same memory location äNo assumption about order of interleaved execution äFor solutions: we need to specify entry and exit sections
ä
repeat
  entry section
   critical section
  exit section
   remainder section
forever